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nAst1: Progress and Concepts Thread

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  • robertisaar
    replied
    no real progress, what time I've had to play with any code projects has been trying to get the boost patch for the 94-95 3100/3.4RWD PCM operating correctly.

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  • ericjon262
    replied
    any updates here? I'm sitting on a very poorly built fence, I'm extremely tempted to ditch the obd2 stuff I've got and go obd1, the biggest thing keeping me on the obd2 side is that I already have a flashtool/scanner.

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  • ericjon262
    replied
    Originally posted by robertisaar View Post
    a 94 lumina w/3.1 should be a rebadged 9396(definitely if it was a 4T60E car and not a 3T40).... probably a change to some EMI filtering components or something along those lines.
    cool, thanks!

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  • robertisaar
    replied
    a 94 lumina w/3.1 should be a rebadged 9396(definitely if it was a 4T60E car and not a 3T40).... probably a change to some EMI filtering components or something along those lines.

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  • ericjon262
    replied
    went junk yard hopping for a 9396, and didn't have any luck, but I did find a similar PCM, so I picked it up for shits and giggles. it's a 16197409, from out of a 94 Lumina 3.1. I couldn't find anything out about it, any ideas? I'm gonna start ordering connectors, pins, and wire to make this thing work. I want to see what this car will do, but I also don't want to be limited to 6400 rpm like the obd2 bits limit me too. I'm also very interested in flex fuel, so if you're down for the challenge, I'm willing to be the test bed, and data log it for review.

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  • ericjon262
    replied
    Originally posted by Fierobsessed:

    Figured something out the other day... Gm's flex fuel composition sensors output signal is compatible with the unused MAF signal input on the 1227730 ECM. So...

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  • brian89gp
    replied
    Finally found it. Schematic entry is what it is called, the type of programming where you draw the actual electric schematic and gate logic (instead of piecing it together with 74HC00 logic gate IC's) This could replace the functions of the U4 and U8 address decoder IC's for the 2k SRAM, the 4k SRAM mod by Montecarslow, the schematic above, etc.

    The Xilinx XC3572XL has 5v tolerant IO pins and Atmel has a range of 5v CPLD devices.

    Has a XC9572XL dev board as well as a couple simple examples:

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  • robertisaar
    replied
    i'm going to need to do more reading... if they work the way i think they do, then it really isn't that difficult to get the results i would want out of it.

    if they don't, then i'm pretty much treading water.

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  • brian89gp
    replied
    VHDL/Verilog = "the" circuit

    There is no CPU in a CPLD (though you could program a CPLD to act as a CPU http://www.bigmessowires.com/cpu-in-a-cpld/) so there is no code to run, in serial, and to loop through. The CPLD 'program' is the actual hardware circuitry of all the gates and interconnections.

    A CPLD is a simplified version of a FPGA if that helps any.

    I can't remember the mode but you have the option of drawing the circuit diagram directly that you want to program into it. VHDL and Verilog are abstractions on top of that. A CPLD program is a circuit of AND/OR/NOR/NAND/etc gates. Think of a CPLD as a programmable replacement of 74HC00 logic chips, where you would pick various different 74HC00 chips for the correct gates and wire them together, instead, with a CPLD you would just program it with the same combination of gates.

    I wish I could find what I was messing with in Verilog but I've seem to have misplaced it.

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  • robertisaar
    replied
    looking at the VHDL link, it seems like you draw the circuits and it creates code based off of it? that doesn't seem like it would be too bad.

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  • brian89gp
    replied
    Yes, somewhat. Except you are thinking in a serial CPU way. Different method to the same result.

    4:1 mux in VHDL. The 2 bit address select is a good example of address bus decoding.
    An online space for sharing VHDL coding tips and tricks. Learn VHDL through hundreds of programs for all levels of learners.


    And Verilog examples.
    Last edited by brian89gp; 10-24-2014, 11:21 PM.

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  • robertisaar
    replied
    well, it doesn't run a program, but it is programmed, which sounds like some modern equivalent of a turing machine... ?

    where should i start looking up how these things work(and how they're programmed)? i don't suppose it would be something as simple as this?

    IF ADDRESS >$2000, CONTINUE, ELSE CLEAR BIT
    IF ADDRESS <$8000, CONTINUE, ELSE CLEAR BIT
    SET BIT

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  • brian89gp
    replied
    Click image for larger version

Name:	photo.JPG
Views:	1
Size:	111.3 KB
ID:	377914Doesn't run a program, it isn't a CPU. Its a chip that you can program thousands of 7400 series chips (boolean logic) into. The attached image is a (mostly) correct chip select to be able to use some of the additional address ranges, instead of using the seven 7400 chips you could program a CPLD with the same logic gate arrangement to do the same thing in the same way.
    Last edited by brian89gp; 10-24-2014, 09:05 AM.

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  • robertisaar
    replied
    googling for some common units, i'm seeing company/product lines that i have a vague association with the game console modchip community... i may have to look into this a bit more tomorrow, i'm curious to see how something like this runs a program.

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  • brian89gp
    replied
    Less then $5 and probably closer to $1. It is pretty much a very fast programmable 7400 array..... I toyed around for a couple hours in Verilog with a very messy if/then tree (if address x then enable CS, over and over) and deemed it possible before I got distracted by other shiny things.

    I was thinking there was a way to program them with a model based on 7400 logic gates instead of Verilog/VDHL if you preferred programming on the hardware level.

    The Xilinx part in the Moates F3 Ford adapter is a CPLD, I am guessing to do chip select decoding since what else would it be there for.
    This is the newer version of the F3 chip module for pre-2005 EEC. Compatible with Jaybird and BURN2/FA with free 5.15.F firmware update. Supports 8-positions of 1/2/4-bank. Automatic PATS masking logic with manual jumpers for selective defeat. Full 256k read/write for scratchpad access.

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